The phase locked loop or PLL is a particularly useful circuit block that is widely used in radio frequency or wireless applications.
In view of its usefulness, the phase locked loop or PLL is found in many wireless, radio, and general electronic items from mobile phones to broadcast radios, televisions to Wi-Fi routers, walkie talkie radios to professional communications systems and vey much more.
Phase locked loop, PLL applications
The phase locked loop take in a signal to which it locks and can then output this signal from its own internal VCO. At first sight this may not appear particularly useful, but with a little ingenuity, it is possible to develop a large number of phase locked loop applications.
Some phase lock loop applications include:
- FM demodulation: One major phase locked loop application is that of a FM demodulator. With PLL chips now relatively cheap, this PLL applications enables high quality audio to be demodulated from an FM signal.
- AM demodulation: Phase locked loops can be used in the synchronous demodulation of amplitude modulated signals. Using this approach, the PLL locks onto the carrier so that a reference within the receiver can be generated. As this corresponds exactly to the frequency of the carrier, it can be mixer with the incoming signal to synchronous demodulate the AM.
- Indirect frequency synthesizers: Use within a frequency synthesizer is one of the most important phase locked loop applications. Although direct digital synthesis is also used, indirect frequency synthesis forms one of the major phase locked loop applications.
- Signal recovery: The fact that the phase locked loop is able to lock to a signal enables it to provide a clean signal, and remember the signal frequency if there is a short interruption. This phase locked loop application is used in a number of areas where signals may be interrupted for short periods of time, for example when using pulsed transmissions.
- Timing distribution: Another phase locked loop application is in the distribution precisely timed clock pulses in digital logic circuits and system, for example within a microprocessor system.
Phase locked loop basic concepts - phase
The key to the operation of a phase locked loop, PLL, is the phase difference between two signals, and the ability to detect it. The information about the error in phase or the phase difference between the two signals is then used to control the frequency of the loop.
To understand more about the concept of phase and phase difference, it is possible to visualise two waveforms, normally seen as sine waves, as they might appear on an oscilloscope. If the trigger is fired at the same time for both signals they will appear at different points on the screen.
The linear plot can also be represented in the form of a circle. The beginning of the cycle can be represented as a particular point on the circle and as a time progresses the point on the waveform moves around the circle. Thus a complete cycle is equivalent to 360° or 2π radians. The instantaneous position on the circle represents the phase at that given moment relative to the beginning of the cycle.
Phase angle of points on a sine wave
The concept of phase difference takes this concept a little further. Although the two signals we looked at before have the same frequency, the peaks and troughs do not occur in the same place.
There is said to be a phase difference between the two signals. This phase difference is measured as the angle between them. It can be seen that it is the angle between the same point on the two waveforms. In this case a zero crossing point has been taken, but any point will suffice provided that it is the same on both.
This phase difference can also be represented on a circle because the two waveforms will be at different points on the cycle as a result of their phase difference. The phase difference measured as an angle: it is the angle between the two lines from the centre of the circle to the point where the waveform is represented.
Phase difference between signals
When there two signals have different frequencies it is found that the phase difference between the two signals is always varying. The reason for this is that the time for each cycle is different and accordingly they are moving around the circle at different rates.
It can be inferred from this that the definition of two signals having exactly the same frequency is that the phase difference between them is constant. There may be a phase difference between the two signals. This only means that they do not reach the same point on the waveform at the same time. If the phase difference is fixed it means that one is lagging behind or leading the other signal by the same amount, i.e. they are on the same frequency.
Phase locked loop basics
A phase locked loop, PLL, is basically of form of servo loop. Although a PLL performs its actions on a radio frequency signal, all the basic criteria for loop stability and other parameters are the same. In this way the same theory can be applied to a phase locked loop as is applied to servo loops.
Basic phase locked loop basic diagram
Phase locked loop operation
The basic concept of the operation of the PLL is relatively simple, although the mathematical analysis and many elements of its operation are quite complicated
The diagram for a basic phase locked loop shows the three main element of the PLL: phase detector, voltage controlled oscillator and the loop filter.
In the basic PLL, reference signal and the signal from the voltage controlled oscillator are connected to the two input ports of the phase detector. The output from the phase detector is passed to the loop filter and then filtered signal is applied to the voltage controlled oscillator.
Phase locked loop diagram showing voltages
The Voltage Controlled Oscillator, VCO, within the PLL produces a signal which enters the phase detector. Here the phase of the signals from the VCO and the incoming reference signal are compared and a resulting difference or error voltage is produced. This corresponds to the phase difference between the two signals.
The error signal from the phase detector passes through a low pass filter which governs many of the properties of the loop and removes any high frequency elements on the signal. Once through the filter the error signal is applied to the control terminal of the VCO as its tuning voltage. The sense of any change in this voltage is such that it tries to reduce the phase difference and hence the frequency between the two signals. Initially the loop will be out of lock, and the error voltage will pull the frequency of the VCO towards that of the reference, until it cannot reduce the error any further and the loop is locked.
When the PLL, phase locked loop, is in lock a steady state error voltage is produced. By using an amplifier between the phase detector and the VCO, the actual error between the signals can be reduced to very small levels. However some voltage must always be present at the control terminal of the VCO as this is what puts onto the correct frequency.
The fact that a steady error voltage is present means that the phase difference between the reference signal and the VCO is not changing. As the phase between these two signals is not changing means that the two signals are on exactly the same frequency.
The phase locked loop, PLL is a very useful building block, particularly for radio frequency applications. The PLL forms the basis of a number of RF systems including the indirect frequency synthesizer, a form of FM demodulator and it enables the recovery of a stable continuous carrier from a pulse waveform. In this way, the phase locked loop, PLL is an essential RF building tool.
